Comenzi TCL în Vivado: Diferență între versiuni
Sari la navigare
Sari la căutare
Pagină nouă: __TOC__ =Link-uri externe= * [https://docs.amd.com/r/2025.2-English/ug1144-petalinux-tools-reference-guide/Building-a-System-Image PetaLinux Tools Documentation: Reference Guide (UG1144)] |
Fără descriere a modificării |
||
| Linia 1: | Linia 1: | ||
__TOC__ | __TOC__ | ||
Pentru Arty Z7, part name este: | |||
<syntaxhighlight lang="tcl"> | |||
report_property [get_parts xc7z020clg400-1] | |||
</syntaxhighlight> | |||
Cu proprietățile: | |||
<syntaxhighlight lang="debug"> | |||
Property Type Read-only Value | |||
ARCHITECTURE string true zynq | |||
ARCHITECTURE_FULL_NAME string true Zynq-7000 | |||
AVAILABLE_CONFIG_MODES string* true {JTAG/Boundary Scan} | |||
AVAILABLE_IOBS int true 125 | |||
BLOCK_RAMS int true 140 | |||
CLASS string true part | |||
COLS int true 187 | |||
COMPATIBLE_PARTS string* true xc7z010clg400 | |||
C_FAMILY string true zynq | |||
DEVICE string true xc7z020 | |||
DSP int true 220 | |||
FAMILY string true zynq | |||
FE int true 0 | |||
FLIPFLOPS int true 106400 | |||
GB_TRANSCEIVERS int true 0 | |||
IDCODE string true 0x03727093 | |||
IO_PIN_COUNT int true 400 | |||
IO_STANDARDS string true LVTTL LVCMOS33 LVCMOS25 LVCMOS18 LVCMOS15 LVCMOS12 HSUL_12 HSTL_I HSTL_II HSTL_I_18 HSTL_II_18 SSTL18_I SSTL18_II SSTL15 SSTL15_R SSTL135 SSTL135_R DIFF_HSTL_I DIFF_HSTL_II DIFF_HSTL_I_18 DIFF_HSTL_II_18 DIFF_SSTL18_I DIFF_SSTL18_II DIFF_SSTL15 DIFF_SSTL15_R DIFF_SSTL135 DIFF_SSTL135_R DIFF_HSUL_12 PCI33_3 MOBILE_DDR DIFF_MOBILE_DDR BLVDS_25 LVDS_25 RSDS_25 TMDS_33 MINI_LVDS_25 PPDS_25 | |||
LUT_ELEMENTS int true 53200 | |||
MAX_OPERATING_TEMPERATURE int true 0 | |||
MAX_OPERATING_VOLTAGE double true 1.050 | |||
MCBS int true 0 | |||
MIN_OPERATING_TEMPERATURE int true 0 | |||
MIN_OPERATING_VOLTAGE double true 0.950 | |||
MMCM int true 4 | |||
NAME string true xc7z020clg400-1 | |||
PACKAGE string true clg400 | |||
PACKAGE_PINOUT_VERSION string true FINAL 2012-06-26 | |||
PACKAGE_PIN_DELAY_VERSION string true VERS. 2.0 2012-06-26 | |||
PCI_BUSES int true 0 | |||
REF_OPERATING_TEMPERATURE int true 0 | |||
REF_OPERATING_VOLTAGE double true 0.950 | |||
ROWS int true 157 | |||
SLICES int true 13300 | |||
SLRS int true 1 | |||
SPEED string true -1 | |||
SPEED_LABEL string true PRODUCTION | |||
SPEED_LEVEL_ID string true 1.12 | |||
SPEED_LEVEL_ID_DATE string true 2019-11-22 | |||
SSN_REPORT bool true 1 | |||
SUPPORTS_NEXTGEN_VERSAL bool true 0 | |||
TEMAC_NETWORK_CONTROLLERS int true 0 | |||
TEMPERATURE_GRADE_LETTER string true | |||
</syntaxhighlight> | |||
=Link-uri externe= | =Link-uri externe= | ||
* [https://docs.amd.com/r/2025.2-English/ug1144-petalinux-tools-reference-guide/Building-a-System-Image PetaLinux Tools Documentation: Reference Guide (UG1144)] | * [https://docs.amd.com/r/2025.2-English/ug1144-petalinux-tools-reference-guide/Building-a-System-Image PetaLinux Tools Documentation: Reference Guide (UG1144)] | ||
Versiunea de la data 3 noiembrie 2026 19:43
Pentru Arty Z7, part name este:
report_property [get_parts xc7z020clg400-1]
Cu proprietățile:
Property Type Read-only Value
ARCHITECTURE string true zynq
ARCHITECTURE_FULL_NAME string true Zynq-7000
AVAILABLE_CONFIG_MODES string* true {JTAG/Boundary Scan}
AVAILABLE_IOBS int true 125
BLOCK_RAMS int true 140
CLASS string true part
COLS int true 187
COMPATIBLE_PARTS string* true xc7z010clg400
C_FAMILY string true zynq
DEVICE string true xc7z020
DSP int true 220
FAMILY string true zynq
FE int true 0
FLIPFLOPS int true 106400
GB_TRANSCEIVERS int true 0
IDCODE string true 0x03727093
IO_PIN_COUNT int true 400
IO_STANDARDS string true LVTTL LVCMOS33 LVCMOS25 LVCMOS18 LVCMOS15 LVCMOS12 HSUL_12 HSTL_I HSTL_II HSTL_I_18 HSTL_II_18 SSTL18_I SSTL18_II SSTL15 SSTL15_R SSTL135 SSTL135_R DIFF_HSTL_I DIFF_HSTL_II DIFF_HSTL_I_18 DIFF_HSTL_II_18 DIFF_SSTL18_I DIFF_SSTL18_II DIFF_SSTL15 DIFF_SSTL15_R DIFF_SSTL135 DIFF_SSTL135_R DIFF_HSUL_12 PCI33_3 MOBILE_DDR DIFF_MOBILE_DDR BLVDS_25 LVDS_25 RSDS_25 TMDS_33 MINI_LVDS_25 PPDS_25
LUT_ELEMENTS int true 53200
MAX_OPERATING_TEMPERATURE int true 0
MAX_OPERATING_VOLTAGE double true 1.050
MCBS int true 0
MIN_OPERATING_TEMPERATURE int true 0
MIN_OPERATING_VOLTAGE double true 0.950
MMCM int true 4
NAME string true xc7z020clg400-1
PACKAGE string true clg400
PACKAGE_PINOUT_VERSION string true FINAL 2012-06-26
PACKAGE_PIN_DELAY_VERSION string true VERS. 2.0 2012-06-26
PCI_BUSES int true 0
REF_OPERATING_TEMPERATURE int true 0
REF_OPERATING_VOLTAGE double true 0.950
ROWS int true 157
SLICES int true 13300
SLRS int true 1
SPEED string true -1
SPEED_LABEL string true PRODUCTION
SPEED_LEVEL_ID string true 1.12
SPEED_LEVEL_ID_DATE string true 2019-11-22
SSN_REPORT bool true 1
SUPPORTS_NEXTGEN_VERSAL bool true 0
TEMAC_NETWORK_CONTROLLERS int true 0
TEMPERATURE_GRADE_LETTER string true