Oscilator cu LTC6905

Work in progress. :)

As shown in the Block Diagram, the LTC6905’s master oscillator is controlled by the ratio of the voltage between the V+ and SET pins and the current entering the SET pin (IRES). The voltage on the SET pin is forced to approxi- mately 1V below V+ by the PMOS transistor and its gate bias voltage. A resistor RSET, connected between the V+ and SET pins, “locks together” the voltage (V+ – VSET) and current, IRES, variation. This provides the LTC6905’s high precision. The master oscillation frequency reduces to:

$f_{\text{OSC}}=(\frac{168.5MHz*10k\omega }{R_{\text{SET}}}+1.5MHz)*frac1N$